GoingToMeet

The conference is organized to stimulate and enhance the research and development of ULSI interconnect technology; and each year since 1989 the conference has been held at about the same time in both Japan and USA, and has showcased remarkable interconnect technology development in Asia. Current active development of Cu multilayer wiring technology is aimed at feature sizes of less than 50nm. Securing good reliability between barrier metal and low k in Low k/Cu wiring schemes has become an important topic. In addition, the application of Cu wiring has been broadened to the memory market and is widely used for Flash and DRAM. Moreover, there is advancement in the introduction of metal deposition for transistor surroundings such as for Silicide and Metal Gate, etc. The progress of miniaturization technology for packaging is rapid, and concepts for integrated wiring technology between Si chips and mounting substrates are requested.